Improper handling of overlap between protected memory ranges for some Intel(R) Xeon(R) 6 processor with Intel(R) TDX may allow a privileged user to potentially enable escalation of privilege via local access.
Metrics
Affected Vendors & Products
References
History
Thu, 14 Aug 2025 06:30:00 +0000
Type | Values Removed | Values Added |
---|---|---|
First Time appeared |
Intel
Intel processor Intel xeon Intel xeon Processors |
|
Vendors & Products |
Intel
Intel processor Intel xeon Intel xeon Processors |
|
Metrics |
ssvc
|
Tue, 12 Aug 2025 17:15:00 +0000
Type | Values Removed | Values Added |
---|---|---|
Description | Improper handling of overlap between protected memory ranges for some Intel(R) Xeon(R) 6 processor with Intel(R) TDX may allow a privileged user to potentially enable escalation of privilege via local access. | |
Weaknesses | CWE-1260 | |
References |
| |
Metrics |
cvssV3_1
|

Status: PUBLISHED
Assigner: intel
Published: 2025-08-12T16:58:40.909Z
Updated: 2025-08-14T03:55:11.310Z
Reserved: 2025-01-16T04:00:23.796Z
Link: CVE-2025-22889

Updated: 2025-08-13T18:04:30.363Z

Status : Awaiting Analysis
Published: 2025-08-12T17:15:32.310
Modified: 2025-08-13T17:34:12.350
Link: CVE-2025-22889

No data.